1. Field of the Invention
This invention relates generally to clock resynchronization techniques for a digital communication system between cards and spacedapart card cages.
2. Background of the Invention
Card cages are used to contain a plurality of cards, i.e., printed circuit boards, such cards being electrically coupled to each other by a backplane of the card cage. In some environments, there are a plurality of card cages distributed throughout a facility at the desired locations for the equipment. Typically, these cards in the card cages would comprise, for example, modems, digital service units, encryptors, multiplexers and like data communication or data processing equipment.
In separating the card cages, the only requirement of the system is that it must have the proper amount of cabling and repeaters available. However, the separation of card cages by substantial distances creates a problem in the turnaround delay through the various cables, drivers receivers, and repeaters that are encountered in such a bus implementation. The problem is that data passing over these cables and through these bus components are delayed relative to the clock at the component which is the destination of such data. One solution is to provide a clock at each card cage which would be transmitted with the data so that the receiving component would use the transmitted clock. However, the present inventors. To minimize system cost, decided that they wanted to design a system which could operate from a single master clock source located at a single card cage. When data is transmitted from this single cage with the master clock, no problem is incurred, in that the master clock and data can be transmitted to each of the other card cages and received together at those remote card cages in phase. However, when data is transmitted from a number of card cages back to the single card cage having the master clock, the receiving data will be normally out of phase with the master clock, due to the above-described delays caused by cable propagation, bus repeaters, bus drivers, and bus receivers. Moreover, the amount of phase shift is dependent upon which card cage the data was transmitted from.
Synchronous transmission of a serial data stream does not use start-stop bits to frame characters, as is done with asynchronous transmission. At the receiving equipment that receives the serial data stream, bit synchronization is achieved through a received clock signal which is coincident with the received serial data stream. Typically, the received clock signal is either transmitted with the data, or derived from the data. This technique of deriving the clock from the data, called selfclocking, overcomes the effect of propagation delay between distant stations by deriving the clock, typically by the use of phase lock loops, from the 0 to 1 and 1 to 0 transitions occurring in the digital received data. With the derived clock, each bit period can be sampled toward its middle. As a result of the sampling, the incoming data is regenerated in synchronism with the derived clock.